Technical Program Committee

TPC Chair
Hung-Ming Chen (National Chiao Tung University, Taiwan)
TPC Vice Chair
Yoshinori Takeuchi (Kindai University, Japan)
TPC Secretary
Chun-Yao Wang (National Tsing Hua University, Taiwan)
Design Experiences Subcommittee
Chair
Koyo Nitta (NTT Corporation, Japan)
Members
Omar Hammami (ENSTA ParisTech, France)
Masanori Hariyama (Tohoku University, Japan)
Chih-Tsun Huang (National Tsing Hua University, Taiwan)
Xin Jin (Tsinghua University, China)
Takeshi Kumaki (Ritsumeikan University, Japan)
Tsung-Te Liu (National Taiwan University, Taiwan)
Masanori Muroyama (Tohoku University, Japan)
Ken Nakamura (NTT Corp., Japan)
Seiya Shibata (NEC Corp., Japan)
Jun Shiomi (Kyoto University, Japan)
Yoshinori Tomita (Fujitsu Laboratories Ltd., Japan)
System Level Design Subcommittee
Chair
Hiroshi Saito (University of Aizu, Japan)
Members
Yi-Jung Chen (National Chi Nan University, Taiwan)
Pao-Ann Hsiung (National Chung Cheng University, Taiwan)
Ing-Jer Huang (National Sun Yat-sen University, Taiwan)
Masashi Imai (Hirosaki University, Japan)
Michihiro Koibuchi (National Institute of Informatics, Japan)
Bo-Cheng Lai (National Chiao Tung University, Taiwan)
Kyoungwoo Lee (Yonsei University, Republic of Korea)
Daisuke Murakami (Socionext, Japan)
Hiroki Nakahara (Tokyo Institute of Technology, Japan)
Yunheung Paek (Seoul National University, Republic of Korea)
Kenshu Seto (Tokyo City University, Japan)
Kotaro Shimamura (Hitachi, Japan)
Salita Sombatsiri (NEC, Japan)
Makoto Sugihara (University of Kitakyushu, Japan)
Shinya Takamaeda-Yamazaki (Hokkaido University, Japan)
Ittetsu Taniguchi (Osaka University, Japan)
Nozomu Togawa (Waseda University, Japan)
Yoichi Tomioka (University of Aizu, Japan)
Hiroyuki Tomiyama (Ritsumeikan Univ., Japan)
Logic Level Design Subcommittee
Chair
Juinn-Dar Huang (National Chiao Tung University, Taiwan)
Members
Yung-Chih Chen (Yuan Ze University, Taiwan)
Tomonori Izumi (Ritsumeikan University, Japan)
Tetsushi Koide (Hiroshima University, Japan)
Chien-Nan Liu (National Chiao Tung University, Taiwan)
Kohei Miyase (Kyushu Institute of Technology, Japan)
Miroslav Velev (Aries Design Automation, USA)
Nobuya Watanabe (Okayama University, Japan)
Robert Wille (Johannes Kepler University, Austria)
Shigeru Yamashita (Ritsumeikan University, Japan)
Hiroaki Yoshida (Fujitsu Laboratories of America, Inc., USA)
Qian Zhao (Kyushu Institute of Technology, Japan)
Physical Level Design Subcommittee
Chair
Yukihide Kohira (The University of Aizu, Japan)
Members
Horomitsu Awano (Osaka University, Japan)
Shao-Yun Fang (National Taiwan University of Science and Technology, Taiwan)
Koutaro Hachiya (Teikyo Heisei University, Japan)
Masato Inagi (Hiroshima City University, Japan)
Tsutomu Ishida (Fujitsu Laboratories Ltd., Japan)
Toshiki Kanamoto (Hirosaki University, Japan)
Atsushi Kurokawa (Hirosaki University, Japan)
Jai-Ming Lin (National Cheng Kung University, Taiwan)
Mark Po-Hung Lin (National Chung Cheng University, Taiwan)
Yibo Lin (Peking University, China)
Bo Yang (Synopsys Inc., USA)
Hailong Yao (Tsinghua University, China)
Bei Yu (The Chinese University of Hong Kong, Hong Kong)
Wenxing Zhu (Fuzhou University, China)
Last Modified: September 23, 2019