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The 15th Workshop on Synthesis And System Integration of Mixed Information technologies

Invited Talk I
Time: 9:15 - 10:00 Monday, March 9, 2009
Location: Waikele
Chair: Kimiyoshi Usami (Shibaura Institute of Technology, Japan)

I1-1 (Time: 9:15 - 10:00)
TitleAnalysis and Optimization of Power-Gated Designs
AuthorMing-Chao Lee, De-Shiuan Chiou, *Shih-Chieh Chang (National Tsing Hua University, Taiwan)
Pagepp. 3 - 8
AbstractLeakage power has become a major contribution in total power consumption. A very popular technique to reduce the leakage power is power gating. In this paper, we discuss two important optimization issues in power gating designs. First, we discuss the sizing problem of the sleep transistors which is the trade-off between the size and IR drop noise in the power gating designs. Moreover, we also discuss the wakeup scheduling optimization and propose efficient wakeup scheduling for a power gating design. Our experimental results are very encouraging and outperform those previous works.