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The 15th Workshop on Synthesis And System Integration of Mixed Information technologies

Poster V: Mixed Signal Design
Time: 14:00 - 15:45 Tuesday, March 10, 2009
Location: Manza & Kaneohe
Chairs: Ikuo Harada (NTT, Japan), Yutaka Tamiya (Fujitsu Labs., Ltd., Japan)

R5-1 (Time: 14:00 - 14:03)
TitleA Design Optimization of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique
Author*Shoichi Hara, Rui Murakami, Kenichi Okada, Akira Matsuzawa (Tokyo Inst. of Tech., Japan)
Pagepp. 399 - 404
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R5-2 (Time: 14:03 - 14:06)
TitleNumerical Flicker Noise Model for Dual Channel FETs
Author*Chia-Yu Chen, Yang Liu, Robert W. Dutton (Stanford Univ., United States), Junko Sato-Iwanaga, Akira Inoue, Haruyuki Sorada (Matsushita Electric Industrial Co.,Ltd., Japan)
Pagepp. 405 - 409
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R5-3 (Time: 14:06 - 14:09)
TitleEfficient State Space Enumeration for the Verification of Analog Designs
Author*Pao-Jen Huang, Wei-Hsiang Cheng, Chien-Nan Liu (National Central Univ., Taiwan)
Pagepp. 410 - 415
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R5-4 (Time: 14:09 - 14:12)
TitleA Study on Mobility Degradation Effect for High PSRR Linear Voltage-to-Current Converter Design
AuthorChun Wei Lin, *Sheng Feng Lin, You Cheng Huang (National Yunlin Univ. of Science and Tech., Taiwan)
Pagepp. 416 - 421
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R5-5 (Time: 14:12 - 14:15)
TitleA Predictive Test Strategy for LNAs for RF CMOS Receivers
Author*Kay Suenaga, Rodrigo Picos, Sebastia Bota, Miquel Roca, Eugeni Isern, Eugeni Garcia-Moreno (Univ. of Balearic Islands, Spain)
Pagepp. 422 - 427
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R5-6 (Time: 14:15 - 14:18)
TitleA Compact On-Chip Testing Scheme for Analog-Mixed Signal Systems Using Two-Step AC and DC Fault Signature Characterizations
Author*Wimol San-Um, Masayoshi Tachibana (Kochi Univ. of Tech., Japan)
Pagepp. 428 - 433
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R5-7 (Time: 14:18 - 14:21)
TitleAn Assertion-Based Verification Methodology for SystemC-AMS Designs
Author*Stefan Lämmermann (Univ. Tübingen, Germany), Alexander Jesser (Universität Frankfurt, Germany), Roland Weiss, Juergen Ruf, Thomas Kropf (Univ. Tübingen, Germany), Lars Hedrich (Universität Frankfurt, Germany), Wolfgang Rosenstiel (Univ. Tübingen, Germany)
Pagepp. 434 - 439
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R5-8 (Time: 14:21 - 14:24)
TitleReliability Aware Power Grid Optimization with Consideration of Thermal Effects
Author*Haruo Miki, Yoshiyuki Kawakami (Ritsumeikan Univ., Japan), Masaya Yoshikawa (Meijo Univ., Japan), Masahiro Fukui (Ritsumeikan Univ., Japan)
Pagepp. 440 - 445
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R5-9 (Time: 14:24 - 14:27)
TitleAnalysis of Process Variations in 90-nm CMOS Technology using Ring Oscillators
AuthorAkihiro Kaya, Koh Johguchi, Shinya Izumi, Hans Jürgen Mattausch, *Tetsushi Koide (Hiroshima Univ., Japan)
Pagepp. 446 - 449
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R5-10 (Time: 14:27 - 14:30)
TitleYield Improvement in Memory Compiler Generated SRAM with Inter-Die Variations
AuthorChia-Chi Hsiao, *Hung-Ming Chen (National Chiao Tung Univ., Taiwan), Ching-Che Chung (National Chung Cheng Univ., Taiwan)
Pagepp. 450 - 455
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R5-11 (Time: 14:30 - 14:33)
TitleAsynchronous Differential Capacitance-to-Digital Converter for Capacitive Sensors
Author*Tuan Minh Vo, Yasuhide Kuramochi, Masaya Miyahara, Takashi Kurashina, Akira Matsuzawa (Tokyo Inst. of Tech., Japan)
Pagepp. 456 - 461
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R5-12 (Time: 14:33 - 14:36)
TitleNew Device-Level Technology Retargeting Algorithm with Fixed-Topology Constraints
Author*Ying-Zhih Chuang, De-Shiun Fu, Yih-Lang Li (National Chiao Tung Univ., Taiwan)
Pagepp. 462 - 467
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R5-13 (Time: 14:36 - 14:39)
TitleA Design of Active Decoupling Circuit for the Substrate Noise Reduction on a Mixed Signal LSI
Author*Daisuke Satoh, Nobuhiko Nakano (Keio Univ., Japan)
Pagepp. 468 - 472
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R5-14 (Time: 14:39 - 14:42)
TitleA Multiphase Digital Controlled Oscillator with DVC Technique
Author*Pao-Lung Chen, Chun-Fu Liu, Tsung-Hsiang Lin (National Kaohsiung First Univ. of Science and Tech., Taiwan)
Pagepp. 473 - 476
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R5-15 (Time: 14:42 - 14:45)
TitleA Wireless Chip for Intra-Oral Temperature Measurement
Author*Tomohiro Ishikawa, Yoshihiro Masui, Koh Johguchi, Takeshi Yoshida, Yuji Murakami (Hiroshima Univ., Japan)
Pagepp. 477 - 481
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