| Title | Formal Representation and Verification of Arithmetic Circuits Using Symbolic Computer Algebra |
| Author | *Yuki Watanabe, Naofumi Homma, Takafumi Aoki (Tohoku Univ., Japan), Tatsuo Higuchi (Tohoku Inst. of Tech., Japan) |
| Page | pp. 461 - 468 |
| Detailed information (abstract, keywords, etc) | |
| Title | Range Equivalent Circuit Minimization |
| Author | *Yung-Chih Chen, Chun-Yao Wang (National Tsing Hua Univ., Taiwan) |
| Page | pp. 469 - 476 |
| Detailed information (abstract, keywords, etc) | |
| Title | Predictive Test Strategy for CMOS RF Mixers |
| Author | *Kay Suenaga, Rodrigo Picos, Sebastia Bota, Miquel Roca, Eugeni Isern, Eugeni Garcia-Moreno (Univ. of Balearic Islands, Spain) |
| Page | pp. 477 - 483 |
| Detailed information (abstract, keywords, etc) | |
| Title | Unifying AMBA based Verification Environment at SystemC / RTL / FPGA Levels: Using 3D Graphics SoC As an Example |
| Author | *Wei-Sheng Huang, Ruei-Ting Gu, Ing-Jer Huang (National Sun Yat-Sen Univ., Taiwan) |
| Page | pp. 484 - 487 |
| Detailed information (abstract, keywords, etc) | |
| Title | Hardware/Software Covalidation with FPGA and RTOS Model |
| Author | *Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ., Japan) |
| Page | pp. 488 - 494 |
| Detailed information (abstract, keywords, etc) | |
| Title | Pipeline-Aware Instruction-Level Power Analysis for VLIW DSP Core |
| Author | Wen-Tsan Hsieh, Hsin-Ying Liao, *Chien-Nan Jimmy Liu (National Central Univ., Taiwan), Shu-Yu Cheng, Ji-Jan Chen (SOC Technology Center of Industrial Technological Research Institute, Taiwan) |
| Page | pp. 495 - 499 |
| Detailed information (abstract, keywords, etc) | |
| Title | Automatic Generation of Custom Interface Transactors for Verification Environments |
| Author | *Rafael K. Morizawa, Hiroaki Iwashita, Koichiro Takayama (Fujitsu Laboratories, LTD., Japan) |
| Page | pp. 500 - 506 |
| Detailed information (abstract, keywords, etc) | |
| Title | Analog Simulation Meets Digital Verification- A Formal Assertion Approach for Mixed-Signal Verification |
| Author | *Alexander Jesser, Lars Hedrich (Univ. of Frankfurt a.M., Germany), Stefan Laemmermann, Roland Weiss, Juergen Ruf, Thomas Kropf, Wolfgang Rosenstiel (Univ. of Tuebingen, Germany), Alexander Pacholik, Wolfgang Fengler (Technical Univ. of Ilmenau, Germany) |
| Page | pp. 507 - 514 |
| Detailed information (abstract, keywords, etc) | |
| Title | Encoding Assertions with Dynamic Local Variables for Bounded Property Checking |
| Author | *Sho Takeuchi, Kiyoharu Hamaguchi, Toshinobu Kashiwabara (Osaka Univ., Japan) |
| Page | pp. 515 - 521 |
| Detailed information (abstract, keywords, etc) | |
| Title | Evaluation of All-Digital PLL by Using Clock-Period Comparator |
| Author | *Yukinobu Makihara, Masayuki Ikebe, Eiichi Sano (Hokkaido Univ., Japan) |
| Page | pp. 522 - 528 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Lateral Unified-CBiCMOS Buffer Circuit for Driving 5-nF Maximum Load Capacitance per CCD Clock |
| Author | *Masatoshi Kobayashi, Takashi Hamahata, Toshiro Akino (Kinki Univ., Japan), Kenji Nishi (Kinki Univ. Technology College, Japan), Cuong Vo Le, Kohsei Takehara, T. Goji Etoh (Kinki Univ., Japan) |
| Page | pp. 529 - 535 |
| Detailed information (abstract, keywords, etc) | |
| Title | A CMOS Transconductor with Rail-to-Rail Input Stage under 1.8-V Supply Voltage |
| Author | *Tien-Yu Lo, Cheng-Sheng Kao, Wen-Hung Hsieh, Chung-Chih Hung (National Chiao Tung Univ., Taiwan) |
| Page | pp. 536 - 539 |
| Detailed information (abstract, keywords, etc) | |
| Title | Charge Recycling between Divided Blocks in MTCMOS Circuits |
| Author | *Akira Tada, Hiromi Notani, Genichi Tanaka, Takashi Ipposhi (Renesas Technology Corp., Japan), Masaaki Iijima, Masahiro Numa (Kobe Univ., Japan) |
| Page | pp. 540 - 544 |
| Detailed information (abstract, keywords, etc) | |
| Title | CoDaMa: An XML-based Framework to Manipulate Control Data Flow Graphs |
| Author | *Shunitsu Kohara, Shi Youhua, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ., Japan) |
| Page | pp. 545 - 549 |
| Detailed information (abstract, keywords, etc) | |