Technical Program Committee

TPC Chair
Juinn-Dar Huang (National Chiao Tung University, Taiwan)
TPC Vice Chair
Mineo Kaneko (JAIST, Japan)
TPC Secretary
Tsung-Yi Ho (National Chiao Tung University, Taiwan)
Design Experiences Subcommittee
Chair
Yuichi Nakamura (NEC Corporation, Japan)
Members
Yi-Jung Chen (National Chi Nan University, Taiwan)
Omar Hammami (ENSTA ParisTech, France)
Masanori Hariyama (Tohoku University, Japan)
Chih-Tsun Huang (National Tsing Hua University, Taiwan)
Ing-Jer Huang (National Sun Yat-sen University, Taiwan)
Tohru Ishihara (Kyoto University, Japan)
Xin Jin (Tsinghua University, China)
Yuki Kobayashi (Renesas Electronics, Japan)
Masanori Muroyama (Tohoku University, Japan)
Toshiyuki Sakamoto (Toshiba Microelectronics Corp., Japan)
Seiya Shibata (NEC Corp., Japan)
Yutaka Tamiya (Fujitsu Laboratories Ltd., Japan)
Hiroyuki Tomiyama (Ritsumeikan University, Japan)
Jiang Xu (HKUST, Hong Kong)
Akihisa Yamada (Sharp Corp., Japan)
System Level Design Subcommittee
Chair
Tsuyoshi Isshiki (Tokyo Institute of Technology, Japan)
Members
Kiyoung Choi (Seoul National University, Republic of Korea)
Michihiro Koibuchi (NII, Japan)
Kyoungwoo Lee (Yonsei University, Republic of Korea)
Yuichiro Miyaoka (Toshiba Corporation, Japan)
Yunheung Paek (Seoul National University, Republic of Korea)
Hiroshi Saito (University of Aizu, Japan)
Toshinori Sato (Fukuoka University, Japan)
Makoto Sugihara (Kyushu University, Japan)
Ittetsu Taniguchi (Ritsumeikan University, Japan)
Nozomu Togawa (Waseda University, Japan)
Kazutoshi Wakabayashi (NEC, Japan)
Koichiro Yamashita (Fujitsu Laboratories Ltd., Japan)
Guang Yang (CloudPhysics, U.S.A.)
Zhiyi Yu (Fudan University, China)
Gang Zeng (Nagoya University, Japan)
Logic Level Design Subcommittee
Chair
Kazuyoshi Takagi (Kyoto University, Japan)
Members
Rolf Drechsler (University of Bremen, Germany)
Elena Dubrova (Royal Institute of Technology, Sweden)
Hiroyuki Higuchi (Fujitsu Laboratories Ltd., Japan)
Naofumi Homma (Tohoku University, Japan)
Takashi Horiyama (Saitama University, Japan)
Takeshi Matsumoto (Ishikawa National College of Technology, Japan)
Shinobu Nagayama (Hiroshima City University, Japan)
Kazuhiro Nakamura (Nippon Institute of Technology, Japan)
Hiroyuki Ochi (Kyoto University, Japan)
Matthieu Parizy (Fujitsu Laboratories Ltd., Japan)
Miroslav Velev (Aries Design Automation, U.S.A.)
Shigeru Yamashita (Ritsumeikan University, Japan)
Qiang Zhu (Cadence Design Systems, Japan)
Physical Level Design Subcommittee
Chair
Tsung-Yi Ho (National Chiao Tung University, Taiwan)
Members
Hung-Ming Chen (National Chiao Tung University, Taiwan)
Shao-Yun Fang (National Taiwan University of Science and Technology, Taiwan)
Masato Inagi (Hiroshima City University, Japan)
Yuzi Kanazawa (Fujitsu Laboratories Ltd., Japan)
Yukihide Kohira (Aizu University, Japan)
Atsushi Kurokawa (Hirosaki University, Japan)
Bing Li (Technical University of Munich, Germany)
Kenichi Okada (Tokyo Institute of Technology, Japan)
Yasuhiro Takashima (University of Kitakyushu, Japan)
Bo Yang (Synopsys, Japan)
Wenxing Zhu (Fuzhou University, China)
Last Modified: September 29, 2014