| Title | A Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability |
| Author | *Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ., Japan) |
| Page | pp. 233 - 237 |
| Detailed information (abstract, keywords, etc) | |
| Title | Simulations of Flicker Noise in SiGe HMOS: Body Bias Dependence |
| Author | *C.-Y. Chen, Y. Liu, R. W. Dutton (Stanford Univ., United States), J. Sato-Iwanaga, A. Inoue, H. Sorada (Matsushita Electric Industrial Co., Ltd, Japan) |
| Page | pp. 238 - 241 |
| Detailed information (abstract, keywords, etc) | |
| Title | Active Body-Biasing Control on PD-SOI for Dual Supply Voltage Scheme |
| Author | *Yosuke Torii, Kenji Hamada, Kayoko Seto, Masaaki Iijima, Masahiro Numa (Kobe Univ., Japan), Akira Tada, Takashi Ipposhi (Renesas Technology Corp., Japan) |
| Page | pp. 242 - 245 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Look-Ahead Active Body-Biasing Scheme for SOI-SRAM with Dynamic VDDM Control |
| Author | *Kayoko Seto, Yosuke Torii, Masaaki Iijima, Masahiro Numa (Kobe Univ., Japan), Akira Tada, Takashi Ipposhi (Renesas Technology Corp., Japan) |
| Page | pp. 246 - 249 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Study on Variation-Component Decomposition using Polynomial Smoothing Function |
| Author | *Takashi Sato, Hiroyuki Ueyama, Noriaki Nakayama, Kazuya Masu (Tokyo Inst. of Tech., Japan) |
| Page | pp. 250 - 255 |
| Detailed information (abstract, keywords, etc) | |
| Title | Effect of Dummy Fills on High Frequency Characteristics of Spiral Inductor |
| Author | *Akira Tsuchiya, Hidetoshi Onodera (Kyoto Univ., Japan) |
| Page | pp. 256 - 260 |
| Detailed information (abstract, keywords, etc) | |
| Title | Static-Noise-Margin Analysis of Major SRAM-Cell Types Including Production Variations for a 90nm CMOS Process |
| Author | *Shinya Izumi, Koh Johguchi, Hans Jüergen Mattausch, Tetsushi Koide (Hiroshima Univ., Japan) |
| Page | pp. 261 - 265 |
| Detailed information (abstract, keywords, etc) | |
| Title | Active Mode Leakage Power Reduction Based on the Controlling Value of Logic Gates |
| Author | *Lei Chen, Shinji Kimura (Waseda Univ., Japan) |
| Page | pp. 266 - 271 |
| Detailed information (abstract, keywords, etc) | |
| Title | Structural Robustness of Datapaths against Delay-Variation |
| Author | *Keisuke Inoue, Mineo Kaneko, Tsuyoshi Iwagaki (JAIST, Japan) |
| Page | pp. 272 - 279 |
| Detailed information (abstract, keywords, etc) | |
| Title | Critical Issues Regarding A Variation Resilient Flip-Flop |
| Author | Toshinori Sato (Kyushu Univ., Japan), *Yuji Kunitake (Kyushu Inst. of Tech., Japan) |
| Page | pp. 280 - 286 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Case Study of Multi-processor Design with Asynchronous Interconnect using Synchronous Design Tools |
| Author | *Katsunori Tanaka, Yuichi Nakamura, Atsushi Atarashi (NEC Corp., Japan) |
| Page | pp. 287 - 293 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Asynchronous Single-precision Floating-point Divider and its Implementation on FPGA |
| Author | *Masayuki Hiromoto, Shin'ichi Kouyama, Hiroyuki Ochi (Kyoto Univ., Japan), Yukihiro Nakamura (Ritsumeikan Univ., Japan) |
| Page | pp. 294 - 301 |
| Detailed information (abstract, keywords, etc) | |
| Title | Full-Chip Thermal Analysis via Generalized Integral Transforms |
| Author | *Pei-Yu Haung, Chih-Kang Lin, Yu-Min Lee (National Chiao Tung Univ., Taiwan) |
| Page | pp. 302 - 309 |
| Detailed information (abstract, keywords, etc) | |
| Title | A Power Grid Optimization Algorithm by Direct Observation of Timing Error Risk Reduction |
| Author | *Makoto Terao, Kenji Kusano, Yoshiyuki Kawakami, Masahiro Fukui (Ritsumeikan Univ., Japan), Shuji Tsukiyama (Chuo Univ., Japan) |
| Page | pp. 310 - 315 |
| Detailed information (abstract, keywords, etc) | |
| Title | A High-level Power Grid Optimization Algorithm by Direct Observation of Manufacturing Cost Reduction |
| Author | *Takayuki Hayashi, Hironobu Ishijima, Yoshiyuki Kawakami, Masahiro Fukui (Ritsumeikan Univ., Japan) |
| Page | pp. 316 - 321 |
| Detailed information (abstract, keywords, etc) | |
| Title | An Evaluation of Circuit Simulation Algorithms for Hardware Implementation |
| Author | *Taiki Hashizume, Hironobu Ishijima, Masahiro Fukui (Ritsumeikan Univ., Japan) |
| Page | pp. 322 - 327 |
| Detailed information (abstract, keywords, etc) | |