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The 14th Workshop on Synthesis And System Integration of Mixed Information technologies
Technical Program
Remark:
The presenter of each paper is marked with "
*
".
Technical Program:
SIMPLE version
DETAILED version with abstract
One Page (Not Separated) version
Author Index:
HERE
Session Schedule
Monday, October 15, 2007
Opening
9:10 - 9:20
K (Conference Hall (2F))
Keynote Speech
9:20 - 10:20
R1 (Conference Hall (2F) & Poster Room (2F))
Design Experience I
10:20 - 12:05
Lunch
12:05 - 13:25
I1 (Conference Hall (2F))
Invited Talk I
13:25 - 14:10
R2 (Conference Hall (2F) & Poster Room (2F))
FPGA, Place & Route
14:10 - 15:50
I2 (Conference Hall (2F))
Invited Talk II
15:50 - 16:35
R3 (Conference Hall (2F) & Poster Room (2F))
Design Methodology for Nanometer Era
16:35 - 18:15
Banquet
18:30 - 20:30
Tuesday, October 16, 2007
I3 (Conference Hall (2F))
Invited Talk III
9:00 - 9:45
R4 (Conference Hall (2F) & Poster Room (2F))
System Level Design & Logic Synthesis
9:45 - 11:30
I4 (Conference Hall (2F))
Invited Talk IV
11:30 - 12:15
Lunch
12:15 - 13:30
I5 (Conference Hall (2F))
Invited Talk V
13:30 - 14:15
R5 (Conference Hall (2F) & Poster Room (2F))
Design Verification & Design Experience II
14:15 - 16:00
D (Conference Hall (2F))
Panel Discussion
16:00 - 17:30
Closing
17:30 - 17:40