SASIMI 2019
The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies
Technical Program

Remark: The presenter of each paper is marked with "*".

Technical Program: SIMPLE version DETAILED version with abstract

Author Index: HERE

Session Schedule

Monday, October 21, 2019


Registration 8:30 -
Opening 9:00 - 9:20
K1 Keynote Speech I 9:20 - 10:20
R1 Regular Poster Session I 10:20 - 11:50
Lunch 11:50 - 13:20
I1 Invited Talk I 13:20 - 14:10
R2 Regular Poster Session II 14:10 - 15:40
D Panel Discussion 15:40 - 17:10
Banquet 18:00 - 20:00

Tuesday, October 22, 2019


K2 Keynote Speech II 9:20 - 10:20
R3 Regular Poster Session III 10:20 - 11:50
Lunch 11:50 - 13:20
I2 Invited Talk II 13:20 - 14:10
R4 Regular Poster Session IV 14:10 - 15:40
I3 Invited Talk III 15:40 - 16:30
Closing 16:30 - 16:40

List of papers

Remark: The presenter of each paper is marked with "*".

Monday, October 21, 2019

[To Session Table]

Keynote Speech I
Time: 9:20 - 10:20 Monday, October 21, 2019
Chair: Tsung-Yi Ho (National Tsing Hua Univ., Taiwan)

K1-1 (Time: 9:20 - 10:20)

Title	(Keynote Speech) Microfluidics Meets Microbiology: The Journey of Digital Microfluidic Biochips from Laboratory Research to Commercialization and Beyond
Author	*Krishnendu Chakrabarty (Duke Univ., USA)
Page	p. 1
Detailed information (abstract, keywords, etc)

[To Session Table]

Regular Poster Session I
Time: 10:20 - 11:50 Monday, October 21, 2019
Chairs: Masashi Imai (Hirosaki Univ., Japan), Rung-Bin Lin (Yuan Ze Univ., Taiwan)

Best Paper Award
R1-1 (Time: 10:20 - 10:22)

Title	Energy-efficient ECG Signals Outlier Detection Hardware using a Sparse Robust Deep Autoencoder
Author	*Naoto Soga, Shimpei Sato, Hiroki Nakahara (Tokyo Inst. of Tech., Japan)
Page	pp. 2 - 7
Detailed information (abstract, keywords, etc)
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R1-2 (Time: 10:22 - 10:24)

Title	A Design Space Exploration Method of SoC Architecture for CNN-based AI Platform
Author	*Salita Sombatsiri (NEC, Japan), Jaehoon Yu, Masanori Hashimoto (Osaka Univ., Japan), Yoshinori Takeuchi (Kindai Univ., Japan)
Page	pp. 8 - 13
Detailed information (abstract, keywords, etc)
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R1-3 (Time: 10:24 - 10:26)

Title	Reconfigurable Activation Functions for Neural Networks Application
Author	Yu-Jung Huang (I-Shou Univ., Taiwan), Meng-Jhe Li, *Wun-Siou Jhong, Shao-I Chu (National Kaohsiung Univ. of Science and Tech., Taiwan)
Page	pp. 14 - 17
Detailed information (abstract, keywords, etc)
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R1-4 (Time: 10:26 - 10:28)

Title	Minimization of Energy Consumption of Double Modular Redundancy Design of Conditional Processing by Common Condition Dependency
Author	*Kazuhito Ito (Saitama Univ., Japan)
Page	pp. 18 - 23
Detailed information (abstract, keywords, etc)
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R1-5 (Time: 10:28 - 10:30)

Title	Application of Overlap-Add FFT Algorithm for Computation Reduction of Convolution Neural Networks
Author	Hsia-Tsung Wang, *Wei-Kai Cheng (Chung Yuan Christian Univ., Taiwan)
Page	pp. 24 - 26
Detailed information (abstract, keywords, etc)

R1-6 (Time: 10:30 - 10:32)

Title	Improving Global Motion Compensation for Frame Interpolation with High-Resolution and High-Frame-Rate Video
Author	*Keita Ukihashi, Takashi Imagawa (Ritsumeikan Univ., Japan), Hiroshi Tsutsui, Yoshikazu Miyanaga (Hokkaido Univ., Japan), Hiroyuki Ochi (Ritsumeikan Univ., Japan)
Page	pp. 27 - 32
Detailed information (abstract, keywords, etc)
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R1-7 (Time: 10:32 - 10:34)

Title	Configurable Processor Hardware Developing Environment for RISC-V with Vector Extension
Author	*Ryo Taketani (Osaka Univ., Japan), Yoshinori Takeuchi (Kindai Univ., Japan)
Page	pp. 33 - 38
Detailed information (abstract, keywords, etc)
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R1-8 (Time: 10:34 - 10:36)

Title	Improved Multiplier Architecture on ASIC for RLWE-based Key Exchange
Author	*Tatsuki Ono, Song Bian, Takashi Sato (Kyoto Univ., Japan)
Page	pp. 39 - 40
Detailed information (abstract, keywords, etc)

R1-9 (Time: 10:36 - 10:38)

Title	Parameter Embedding for Efficient FPGA Implementation of Binarized Neural Networks
Author	*Reina Sugimoto, Nagisa Ishiura (Kwansei Gakuin Univ., Japan)
Page	pp. 41 - 45
Detailed information (abstract, keywords, etc)
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R1-10 (Time: 10:38 - 10:40)

Title	A 4CH CNN Hardware Architecture for Image Super-Resolution
Author	*Koyo Suzuki, Kazuki Mori, Nobutaka Kuroki (Kobe Univ., Japan), Tetsuya Hirose (Osaka Univ., Japan), Masahiro Numa (Kobe Univ., Japan)
Page	pp. 46 - 50
Detailed information (abstract, keywords, etc)

R1-11 (Time: 10:40 - 10:42)

Title	Approximate Function Configuration by Neural Network on Memory-array Unit
Author	*Xuechen Zang, Shigetoshi Nakatake (Univ. of Kitakyushu, Japan), Hiroyuki Kozutsumi, Mitsunori Katsu (TRL, Japan), Shoichi Sekiguchi (TAIYO YUDEN, Japan)
Page	pp. 51 - 55
Detailed information (abstract, keywords, etc)

R1-12 (Time: 10:42 - 10:44)

Title	A Deep Neuro-Fuzzy for False Decision Prevention on an FPGA
Author	*Masayuki Shimoda, Hiroki Nakahara (Tokyo Inst. of Tech., Japan)
Page	pp. 56 - 61
Detailed information (abstract, keywords, etc)

R1-13 (Time: 10:44 - 10:46)

Title	A Real Chip Evaluation of a CNN Accelerator SNACC
Author	*Ryohei Tomura, Takuya Kojima, Hideharu Amano (Keio Univ., Japan), Ryuichi Sakamoto, Masaki Kondo (Univ. of Tokyo, Japan)
Page	pp. 62 - 67
Detailed information (abstract, keywords, etc)
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R1-14 (Time: 10:46 - 10:48)

Title	IMU-based Rehabilitation System for Upper and Lower Limbs
Author	Chun-Jui Chen, Yi-Ting Lin, Chia-Chun Lin (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (Yuan Ze Univ., Taiwan), *Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Page	pp. 68 - 73
Detailed information (abstract, keywords, etc)

R1-15 (Time: 10:48 - 10:50)

Title	A Smart Single-Sensor Device for Instantaneously Monitoring Lower Limb Exercises
Author	Yan-Ping Chang, Teng-Chia Wang, Chun-Jui Chen, Chia-Chun Lin (National Tsing Hua Univ., Taiwan), *Yung-Chih Chen (Yuan Ze Univ., Taiwan), Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Page	pp. 74 - 79
Detailed information (abstract, keywords, etc)

R1-16 (Time: 10:50 - 10:52)

Title	1-D GDR Aware Cell Generation via P/N bi-partition
Author	Yao-Lin Chang, Hung-Ming Chen, *Wei-Tung Chao, Chien-Hung Lin (National Chiao Tung Univ., Taiwan)
Page	pp. 80 - 81
Detailed information (abstract, keywords, etc)
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[To Session Table]

Invited Talk I
Time: 13:20 - 14:10 Monday, October 21, 2019
Chair: Shigeru Yamashita (Ritsumeikan Univ., Japan)

I1-1 (Time: 13:20 - 14:10)

Title	(Invited Talk) LSI Design and Current Topics for Automotives
Author	*Toshihiro Hattori (Renesas Electronics, Japan)
Page	p. 82
Detailed information (abstract, keywords, etc)

[To Session Table]

Regular Poster Session II
Time: 14:10 - 15:40 Monday, October 21, 2019
Chairs: Yu-Guang Chen (National Central Univ., Taiwan), Ching-Hwa Cheng (Feng Chia Univ., Taiwan)

Outstanding Paper Awards
R2-1 (Time: 14:10 - 14:12)

Title	Insertion Based Procedural Construction of Parallel Prefix Adders
Author	*Bo-Yu Tseng, Mineo Kaneko (JAIST, Japan)
Page	pp. 83 - 88
Detailed information (abstract, keywords, etc)

R2-2 (Time: 14:12 - 14:14)

Title	3D Test Wrapper Chain Synthesis for Test Time and TSV Count Co-optimization under Constraints on I/O Cells
Author	Fan-Hsuan Tang, Hsu-Yu Kao, *Shih-Hsu Huang (Chung Yuan Christian Univ., Taiwan)
Page	pp. 89 - 94
Detailed information (abstract, keywords, etc)

R2-3 (Time: 14:14 - 14:16)

Title	A New Approach to Express Stochastic Numbers
Author	*Yukino Watanabe, Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 95 - 98
Detailed information (abstract, keywords, etc)

R2-4 (Time: 14:16 - 14:18)

Title	Rapid Single-Flux-Quantum Matrix Multiplication Circuit Utilizing Bit-Level Processing
Author	*Nobutaka Kito, Takuya Kumagai (Chukyo Univ., Japan), Kazuyoshi Takagi (Mie Univ., Japan)
Page	pp. 99 - 103
Detailed information (abstract, keywords, etc)
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R2-5 (Time: 14:18 - 14:20)

Title	Irregular Bumps Design Planning for Modern Ball Grid Array Packages
Author	Hsin-Yu Chang, Jyun-Ru Jiang, Simon Chen, Hung-Ming Chen, *Ya-Ying Chien (National Chiao Tung Univ., Taiwan)
Page	pp. 104 - 109
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R2-6 (Time: 14:20 - 14:22)

Title	Droplet Splitting Routing for Micro-Electrode-Dot-Array Digital Microfluidic Biochips
Author	*Ikuru Yoshida, Kota Asai (Ritsumeikan Univ., Japan), Tsung-Yi Ho (National Tsing Hua Univ., Japan), Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 110 - 115
Detailed information (abstract, keywords, etc)

R2-7 (Time: 14:22 - 14:24)

Title	Exploring Time-space Trade-off for Application Mapping onto 3-D Torus NoCs
Author	*Yao Hu, Michihiro Koibuchi (NII, Japan)
Page	pp. 116 - 117
Detailed information (abstract, keywords, etc)
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R2-8 (Time: 14:24 - 14:26)

Title	On Power Supply Pads Planning for Wire-bonded IC
Author	Hui Zhong Leong, *Ming-Yu Huang, Hung-Ming Chen (NCTU Taiwan, Taiwan), Chang-Tzu Lin (ITRI Taiwan, Taiwan)
Page	pp. 118 - 121
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R2-9 (Time: 14:26 - 14:28)

Title	Sample Preparation with Efficient Dilution of Biochemical Fluids using Programmable Microfluidic Devices
Author	*Ying Shuaijie (Ritsumeikan Univ., Japan), Sudip Roy (Indian Inst. of Tech. (IIT) Roorkee, India), Juinn-Dar Huang (National Chiao Tung Univ., Taiwan), Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 122 - 125
Detailed information (abstract, keywords, etc)

R2-10 (Time: 14:28 - 14:30)

Title	An Efficient Character Generation Algorithm for High-Throughput E-Beam Lithography
Author	*Shih-Ting Lin, Hong-Yan Su (National Chiao Tung Univ., Taiwan), Oscar Chen (AnaGlobe Technology, Inc, Taiwan), Yih-Lang Li (National Chiao Tung Univ., Taiwan)
Page	pp. 126 - 131
Detailed information (abstract, keywords, etc)
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R2-11 (Time: 14:30 - 14:32)

Title	Color Balancing-aware Non-Stitch Routing for Multiple Patterning Lithography
Author	*Jia-Hong Chang, Shao-Yun Fang (National Taiwan Univ. of Science and Tech., Taiwan)
Page	pp. 132 - 135
Detailed information (abstract, keywords, etc)
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R2-12 (Time: 14:32 - 14:34)

Title	An Efficient and Effective Macro Placement Algorithm for Large-Scale Mixed-Size Designs
Author	Jai-Ming Lin, You-Lun Deng, Ya-Chu Yang, *Jia-Jian Chen (National Cheng Kung Univ., Taiwan)
Page	pp. 136 - 137
Detailed information (abstract, keywords, etc)

R2-13 (Time: 14:34 - 14:36)

Title	Thermal Modeling and Simulation of a Smart Wrist-worn Wearable Device
Author	*Kodai Matsuhashi (Hirosaki Univ., Japan), Koutaro Hachiya (Teikyo Heisei Univ., Japan), Toshiki Kanamoto, Masasi Imai, Atsushi Kurokawa (Hirosaki Univ., Japan)
Page	pp. 138 - 143
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R2-14 (Time: 14:36 - 14:38)

Title	Mixing of Biochemical Fluids using Programmable Microfluidic Devices
Author	*Yuto Umeda (Ritsumeikan Univ., Japan), Sudip Roy (Indian Inst. of Tech. (IIT) Roorkee, India), Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 144 - 149
Detailed information (abstract, keywords, etc)

R2-15 (Time: 14:38 - 14:40)

Title	Generalized Via Pattern Awareness Substrate Routing Framework for Fine Pitch Ball Grid Array
Author	Jun-Sheng Wu, Chi-An Pan, *Yi-Yu Liu (National Taiwan Univ. of Science and Tech., Taiwan)
Page	pp. 150 - 151
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R2-16 (Time: 14:40 - 14:42)

Title	Acceleration of Radix-Heap based Dijkstra algorithm by Lazy Update
Author	Tomohiro Takahashi (Univ. of Kitakyshu, Japan), *Yasuhiro Takashima (Univ. of Kitakyushu, Japan)
Page	pp. 152 - 157
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R2-17 (Time: 14:42 - 14:44)

Title	A Global Placement Method for RECON Spare Cells in ECO-Friendly Design Style
Author	*Junpei Akashi, Suguru Hojo, Nobutaka Kuroki (Kobe Univ., Japan), Tetsuya Hirose (Osaka Univ., Japan), Masahiro Numa (Kobe Univ., Japan)
Page	pp. 158 - 163
Detailed information (abstract, keywords, etc)

R2-18 (Time: 14:44 - 14:46)

Title	An Efficient Thermal Model of Thin Film NiCr Resistors Considering Pulse Response
Author	*Ryosuke Watanabe (Hirosaki Univ., Japan), Keita Izawa (Nikkohm, Japan), Shota Kajiya, Daiki Tsunemoto, Koki Kasai, Atsushi Kurokawa, Toshiki Kanamoto (Hirosaki Univ., Japan)
Page	pp. 164 - 167
Detailed information (abstract, keywords, etc)

R2-19 (Time: 14:46 - 14:48)

Title	A Smart Knee Pad for Stride Count and Walking Distance Measurement via Knee Angle Calculation
Author	Teng-Chia Wang, Yan-Ping Chang, Chun-Jui Chen, *Chia-Chun Lin (National Tsing Hua Univ., Taiwan), Yung-Chih Chen (Yuan Ze Univ., Taiwan), Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Page	pp. 168 - 173
Detailed information (abstract, keywords, etc)

[To Session Table]

Panel Discussion
Time: 15:40 - 17:10 Monday, October 21, 2019
Moderator: Hung-Ming Chen (National Chiao Tung Univ., Taiwan)

D-1 (Time: 15:40 - 17:10)

Title	(Panel Discussion) Quo Vadis, EDA?
Author	Moderator: Hung-Ming Chen (National Chiao Tung Univ., Taiwan), Panelists: Krishnendu Chakrabarty (Duke Univ., USA), Ulf Schlichtmann (Tech. Univ. München, Germany), Toshihiro Hattori (Renesas Electronics, Japan), Pai H. Chou (National Tsing Hua Univ., Taiwan), Akira Fujimaki (Nagoya Univ., Japan), Donald Lie (Texas Tech Univ., USA), Organizer: Tsung-Yi Ho (National Tsing Hua Univ., Taiwan)
Page	p. 174
Detailed information (abstract, keywords, etc)

Tuesday, October 22, 2019

[To Session Table]

Keynote Speech II
Time: 9:20 - 10:20 Tuesday, October 22, 2019
Chair: Tsung-Yi Ho (National Tsing Hua Univ., Taiwan)

K2-1 (Time: 9:20 - 10:20)

Title	(Keynote Speech) EDA for Optical Networks-on-Chip (ONoCs): Achievements and Future Opportunities
Author	*Ulf Schlichtmann (Tech. Univ. München, Germany)
Page	p. 175
Detailed information (abstract, keywords, etc)

[To Session Table]

Regular Poster Session III
Time: 10:20 - 11:50 Tuesday, October 22, 2019
Chairs: Yukihide Kohira (Univ. of Aizu, Japan), Yasuhiro Takashima (Univ. of Kitakyushu)

Outstanding Paper Awards
R3-1 (Time: 10:20 - 10:22)

Title	Efficiency Investigation of Capacitors Mounted on Re-distribution Layers for FOWLP
Author	*Koki Kasai, Atsushi Kurokawa, Masashi Imai, Toshiki Kanamoto (Hirosaki Univ., Japan)
Page	pp. 176 - 179
Detailed information (abstract, keywords, etc)
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R3-2 (Time: 10:22 - 10:24)

Title	Unbalanced Splitting Tolerant Sample Preparation Algorithm for Digital Microfluidic Biochips
Author	Ling-Yen Song, Yi-Ling Chen, Yung-Chun Lei, *Juinn-Dar Huang (National Chiao Tung Univ., Taiwan)
Page	pp. 180 - 183
Detailed information (abstract, keywords, etc)

R3-3 (Time: 10:24 - 10:26)

Title	KR-CHIP: An Educational Computer equipped with 8-bit Accumulator-based, 16-bit Accumulator-based and 32-bit Pipeline Processors
Author	Hiroyuki Kanbara (ASTEM RI, Japan), Kagumi Azuma, Yuuki Oosako (Kwansei Gakuin Univ., Japan), Atsuya Shibata (NAIST, Japan), *Wakako Nakano (Kwansei Gakuin Univ., Japan)
Page	pp. 184 - 189
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R3-4 (Time: 10:26 - 10:28)

Title	A Trial of Electric Chemical Degradation Process Simulation for Lead-acid Batteries
Author	*Daiki Imai, Masahiro Fukui (Ritsumeikan Univ., Japan), Keiichi Hasegawa (Plan Be, Japan)
Page	pp. 190 - 191
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R3-5 (Time: 10:28 - 10:30)

Title	Register Minimization in Double Modular Redundancy Design with Soft Error Correction by Replay
Author	*Yuya Kitazawa (Saitama Univ., Japan), Shinichi Nishizawa (Fukuoka Univ., Japan), Kazuhito Ito (Saitama Univ., Japan)
Page	pp. 192 - 197
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R3-6 (Time: 10:30 - 10:32)

Title	Comparison of Diagnostic Performance Metrics for Test Point Selection in Analog Circuits
Author	*Koutaro Hachiya (Teikyo Heisei Univ., Japan), Atshushi Kurokawa (Hirosaki Univ., Japan)
Page	pp. 198 - 203
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R3-7 (Time: 10:32 - 10:34)

Title	A 12-bit 500-kS/s SAR ADC with Reconfigurable Mismatch Tolerance
Author	*Yu-Hsiang Nien, Tsung-Heng Tsai (National Chung Cheng Univ., Taiwan)
Page	pp. 204 - 207
Detailed information (abstract, keywords, etc)

R3-8 (Time: 10:34 - 10:36)

Title	High-level synthesis code optimization with loop fusion based on LLVM/Polly
Author	*Yuta Hiyama, Takayuki Todokoro, Kenshu Seto (Tokyo City Univ., Japan), Masato Tatsuoka (JAIST, Japan), Yoshihito Nishida (Socionext, Japan), Mineo Kaneko (JAIST, Japan)
Page	pp. 208 - 213
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R3-9 (Time: 10:36 - 10:38)

Title	Ultra Low Current Measurement with On-chip High Resistance of MOSFET Array
Author	*Xinghuai Zhang, Daishi Isogai, Takaaki Shirakawa, Shigetoshi Nakatake (Univ. of Kitakyushu, Japan)
Page	pp. 214 - 217
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R3-10 (Time: 10:38 - 10:40)

Title	A Note on Optimization Algorithms for FF/Latch-Based High-Level Synthesis
Author	*Keisuke Inoue (International College of Tech., Kanazawa, Japan)
Page	pp. 218 - 222
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R3-11 (Time: 10:40 - 10:42)

Title	FPGA Implementation for WDF-Based Analog Emulator with Complicated Topology
Author	Hsin-Ju Hsu (National Chiao Tung Univ., Taiwan), Ji-Xuan Tsai, Meng-Lin Li (National Central Univ., Taiwan), *Chien-Nan Liu (National Chiao Tung Univ., Taiwan), Jing-Yang Jou (National Central Univ., Taiwan)
Page	pp. 223 - 226
Detailed information (abstract, keywords, etc)

R3-12 (Time: 10:42 - 10:44)

Title	Binary Synthesis from RISC-V Executables
Author	*Shoki Hamana, Nagisa Ishiura (Kwansei Gakuin Univ., Japan)
Page	pp. 227 - 228
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R3-13 (Time: 10:44 - 10:46)

Title	Detection of Vulnerability Guard Elimination by Compiler Optimization Based on Binary Code Comparison
Author	*Yuka Azuma, Nagisa Ishiura (Kwansei Gakuin Univ., Japan)
Page	pp. 229 - 230
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R3-14 (Time: 10:46 - 10:48)

Title	A Stable Equivalent Circuit Identification Algorithm for Li ion Batteries
Author	*Lei Lin, Masahiro Fukui (Ritsumeikan Univ., Japan)
Page	pp. 231 - 236
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R3-15 (Time: 10:48 - 10:50)

Title	An Intravesical Urine Volume Sensor Robust to Body Posture and Movement
Author	*Ryousuke Sakai, Shigetoshi Nakatake (Univ. of Kitakyushu, Japan)
Page	pp. 237 - 238
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R3-16 (Time: 10:50 - 10:52)

Title	Test Pattern Generation for Timing Faults in Rapid Single-Flux-Quantum Circuits
Author	*Kazuyoshi Takagi (Mie Univ., Japan), Mikihiro Ono (Kyoto Univ., Japan), Nobutaka Kito (Chukyo Univ., Japan), Naofumi Takagi (Kyoto Univ., Japan)
Page	pp. 239 - 243
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R3-17 (Time: 10:52 - 10:54)

Title	Incremental Approaches for Locating Design Errors: Averaging EPI-Groups and Generating Additional Input Patterns
Author	*Shogo Ohmura, Hiroshi Nakano, Nobutaka Kuroki (Kobe Univ., Japan), Tetsuya Hirose (Osaka Univ., Japan), Masahiro Numa (Kobe Univ., Japan)
Page	pp. 244 - 249
Detailed information (abstract, keywords, etc)

[To Session Table]

Invited Talk II
Time: 13:20 - 14:10 Tuesday, October 22, 2019
Chair: Chia-Heng Tu (National Cheng Kung Univ., Taiwan)

I2-1 (Time: 13:20 - 14:10)

Title	(Invited Talk) IoT for Enabling Precision Medicine
Author	*Pai H. Chou (National Tsing Hua Univ., Taiwan)
Page	p. 250
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[To Session Table]

Regular Poster Session IV
Time: 14:10 - 15:40 Tuesday, October 22, 2019
Chairs: Chien-Nan Liu (National Chiao Tung Univ., Taiwan), Lih-Yih Chiou (National Cheng Kung Univ., Taiwan)

Outstanding Paper Awards
R4-1 (Time: 14:10 - 14:12)

Title	A Case Study on Design of Approximate Multipliers for MNIST CNN
Author	*Kenta Shirane, Takahiro Yamamoto, Hiroyuki Tomiyama (Ritsumeikan Univ., Japan)
Page	pp. 251 - 255
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R4-2 (Time: 14:12 - 14:14)

Title	A Layout Design Method of QCA without Fixing Data Flow
Author	*Kazuki Morita, Wakaki Hattori, Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 256 - 261
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R4-3 (Time: 14:14 - 14:16)

Title	An Error Diagnosis Technique Using ZDD to Extract Error Location Sets
Author	*Hiroshi Nakano, Shogo Ohmura, Nobutaka Kuroki (Kobe Univ., Japan), Tetsuya Hirose (Osaka Univ., Japan), Masahiro Numa (Kobe Univ., Japan)
Page	pp. 262 - 267
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R4-4 (Time: 14:16 - 14:18)

Title	Performance Improvements for Block-Flushing
Author	*Bao Yifang (Ritsumeikan Univ., Japan), Bing Li (Tech. Univ. of Munich, Germany), Tsung-Yi Ho (National Tsing Hua Univ., Taiwan), Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 268 - 269
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R4-5 (Time: 14:18 - 14:20)

Title	A Proposal of Application Specific Approach with RISC-V Processor on FPGA
Author	*Tetsuo Miyauchi, Kiyofumi Tanaka (JAIST, Japan)
Page	pp. 270 - 273
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R4-6 (Time: 14:20 - 14:22)

Title	A Study on the Optimization of Asynchronous Circuits During RTL Conversion from Synchronous Circuits
Author	*Shogo Semba, Hiroshi Saito (Univ. of Aizu, Japan)
Page	pp. 274 - 279
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R4-7 (Time: 14:22 - 14:24)

Title	Effect of Reducing the Bit Length of LFSRs for SC
Author	*Yudai Sakamoto, Shigeru Yamashita (Ritsumeikan Univ., Japan)
Page	pp. 280 - 285
Detailed information (abstract, keywords, etc)

R4-8 (Time: 14:24 - 14:26)

Title	Design of Asynchronous Circuits on Commercial FPGAs Using Placement Constraints
Author	*Tatsuki Otake, Hiroshi Saito (Univ. of Aizu, Japan)
Page	pp. 286 - 291
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R4-9 (Time: 14:26 - 14:28)

Title	Parallelizing SAT-based Coverage-Driven Design Verification
Author	*Kiyoharu Hamaguchi (Shimane Univ., Japan)
Page	pp. 292 - 295
Detailed information (abstract, keywords, etc)

R4-10 (Time: 14:28 - 14:30)

Title	Quantitative Performance Comparison of Asynchronous and Synchronous Comparators
Author	*Kyota Akimoto, Toshiki Kanamoto, Atsushi Kurokawa, Masashi Imai (Hirosaki Univ., Japan)
Page	pp. 296 - 297
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R4-11 (Time: 14:30 - 14:32)

Title	Wire Load Model for Rapid Power Consumption Evaluation in Early Design Stage of Via-Switch FPGA
Author	*Asuka Natsuhara, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ., Japan)
Page	pp. 298 - 303
Detailed information (abstract, keywords, etc)
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R4-12 (Time: 14:32 - 14:34)

Title	Clock Tree Modification for Circuits with Programmable Delay Elements
Author	*Kota Muroi, Yukihide Kohira (Univ. of Aizu, Japan)
Page	pp. 304 - 309
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R4-13 (Time: 14:34 - 14:36)

Title	A Study on Updating Spins in Ising Model to Solve Combinatorial Optimization Problems
Author	*Yuki Naito, Kunihiro Fujiyoshi (Tokyo Univ. of Agri. and Tech., Japan)
Page	pp. 310 - 315
Detailed information (abstract, keywords, etc)
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R4-14 (Time: 14:36 - 14:38)

Title	A Fast Hotspot Detector Based on Local Features Using Concentric Circle Area Sampling
Author	*Hidekazu Takahashi, Shimpei Sato, Atsushi Takahashi (Tokyo Inst. of Tech., Japan)
Page	pp. 316 - 321
Detailed information (abstract, keywords, etc)
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R4-15 (Time: 14:38 - 14:40)

Title	ROAD: A Novel Approach for Improving Reliability of Multi-core Systems— How Asymmetric Aging Can Lead a Way
Author	Yu-Guang Chen (National Central Univ., Taiwan), Jian-Ting Ke (National Cheng Kung Univ., Taiwan), *Shu-Ting Cheng (Yuan Ze Univ., Taiwan), Ing-Chao Lin (National Cheng Kung Univ., Taiwan)
Page	pp. 322 - 323
Detailed information (abstract, keywords, etc)

R4-16 (Time: 14:40 - 14:42)

Title	A Tuning-Free Reservoir of MOSFET Crossbar Array for Inexpensive Hardware Realization of Echo State Network
Author	*Yuki Kume, Masayuki Hiromoto, Takashi Sato (Kyoto Univ., Japan)
Page	pp. 324 - 329
Detailed information (abstract, keywords, etc)

R4-17 (Time: 14:42 - 14:44)

Title	Estimation of NBTI-Induced Timing Degradation Considering Duty Ratio
Author	*Kunihiro Oshima, Song Bian, Takashi Sato (Kyoto Univ., Japan)
Page	pp. 330 - 335
Detailed information (abstract, keywords, etc)

R4-18 (Time: 14:44 - 14:46)

Title	Polygon Fracture Method Considering Maximum Shot Size for Variable Shaped-Beam Mask Writing
Author	Mitsuru Hasegawa, *Kunihiro Fujiyoshi (Tokyo Univ. of Agri. and Tech., Japan)
Page	pp. 336 - 340
Detailed information (abstract, keywords, etc)

[To Session Table]

Invited Talk III
Time: 15:40 - 16:30 Tuesday, October 22, 2019
Chair: Tsung-Yi Ho (National Tsing Hua Univ., Taiwan)

I3-1 (Time: 15:40 - 16:30)

Title	(Invited Talk) Design and Demonstration of Superconducting Single Flux Quantum Circuits Operating around 50 GHz
Author	*Akira Fujimaki (Nagoya Univ., Japan)
Page	pp. 341 - 342
Detailed information (abstract, keywords, etc)

SASIMI 2019 The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies Technical Program

Session Schedule

List of papers

SASIMI 2019
The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies
Technical Program